cystech electronics corp. spec. no. : c322s3 issued date : 2013.08.29 revised date : 2013.09.09 page no. : 1/8 MTP2301S3 cystek product specification 20v p-channel enhancement mode mosfet MTP2301S3 bv dss -20v i d -1.6a 75m (typ.) r dson(max) @v gs =-4.5v, i d =-1.6a r dson(max) @v gs =-2.5v, i d =-1a 113m (typ.) features ? advanced trench process technology ? high density cell design for ultra low on resistance ? excellent thermal and electrical capabilities ? compact and low profile sot-323 package ? pb-free lead plating and halogen-free package equivalent circuit outline ordering information device package shipping MTP2301S3-0-t1-g sot-323 (pb-free lead plating an d halogen-free package) 3000 pcs / tape & reel MTP2301S3 sot-323 d s g g gate s source d drain
cystech electronics corp. spec. no. : c322s3 issued date : 2013.08.29 revised date : 2013.09.09 page no. : 2/8 MTP2301S3 cystek product specification absolute maximum ratings (ta=25 c) parameter symbol limits unit drain-source voltage v ds -20 v gate-source voltage v gs 8 v continuous drain current @t a =25 c, v gs =-4.5v -1.6 continuous drain current @t a =70 c, v gs =-4.5v i d -1.3 pulsed drain current i dm -10 a maximum power dissipation ta=25 340 (note) ta=70 p d 218 (note) mw operating junction and storage temp erature range tj ; tstg -55~+150 c thermal performance parameter symbol limit unit thermal resistance, j unction-to-ambient(pcb mounted) rth,ja 367 (note) c/w note : device mounted on minimum copper pad. electrical characteristics (ta=25 c) symbol min. typ. max. unit test conditions static bv dss -20 - - v v gs =0, i d =-250a v gs(th) -0.45 - - v v ds =v gs , i d =-250a i gss - - 100 na v gs =8v, v ds =0 i dss - - -1 a v ds =-16v, v gs =0 - 75 110 i d =-1.6a, v gs =-4.5v *r ds(on) - 113 150 m i d =-1a, v gs =-2.5v *g fs - 4.5 - s v ds =-5v, i d =-1.6a dynamic ciss - 446 - coss - 57 - crss - 52 - pf v ds =-10v, v gs =0, f=1mhz t d(on) - 9.2 20 t r - 7.3 60 t d(off) - 38 50 t f - 12 20 ns v dd =-10v, i d =-1a, v gs =-4.5v, r g =6 qg - 4.4 - qgs - 0.5 - qgd - 1.5 - nc v ds =-10v, i d =-1.6a, v gs =-2.5v source-drain diode i s - - -1.6 a - v sd - -0.86 -1.2 v v gs =0v, i s =-1.6a trr* - 30 - ns qrr* - 25 - nc i f =-3a, di f /dt=100a/ s *pulse test : pulse width 300s, duty cycle 2%
cystech electronics corp. spec. no. : c322s3 issued date : 2013.08.29 revised date : 2013.09.09 page no. : 3/8 MTP2301S3 cystek product specification typical characteristics typical output characteristics 0 2 4 6 8 10 012345 -v ds , drain-source voltage(v) -i d , drain current (a) -v gs =5v, 4v, 3v - v gs = 2v -v gs =1v brekdown voltage vs ambient temperature 0.4 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) -bv dss , normalized drain-source breakdown voltage i d =-250 a, v gs =0v static drain-source on-state resistance vs drain current 10 100 1000 0.01 0.1 1 10 -i d , drain current(a) r ds(on) , static drain-source on-state resistance(m) -v gs =1.5v -v gs =4.5v -v gs =2.5v -v gs =2v reverse drain current vs source-drain voltage 0.2 0.4 0.6 0.8 1 1.2 024681 -i dr , reverse drain current (a) -v sd , source-drain voltage(v) 0 tj=25c tj=150c v gs =0v static drain-source on-state resistance vs gate-source voltage 40 80 120 160 200 240 280 320 360 400 012345 -v gs , gate-source voltage(v) r ds( on) , static drain-source on- state resistance(m) i d =-1.6a drain-source on-state resistance vs junction tempearture 0.4 0.6 0.8 1 1.2 1.4 1.6 -60 -20 20 60 100 140 180 tj, junction temperature(c) r ds( on) , normalized static drain- source on-state resistance v gs =-4.5v, i d =-1.6a
cystech electronics corp. spec. no. : c322s3 issued date : 2013.08.29 revised date : 2013.09.09 page no. : 4/8 MTP2301S3 cystek product specification typical characteristics(cont.) capacitance vs drain-to-source voltage 10 100 1000 0.1 1 10 100 -v ds , drain-source voltage(v) capacitance---(pf) c oss ciss crss threshold voltage vs junction tempearture 0.4 0.6 0.8 1 1.2 1.4 -60 -40 -20 0 20 40 60 80 100 120 140 160 tj, junction temperature(c) -v gs( th) ,normalized threshold voltage i d =-250 a i d =-1ma single pulse power rating, junction to ambient (note 1 on page 2) 0 1 2 3 4 5 6 7 8 9 10 0.001 0.01 0.1 1 10 100 pulse width(s) power (w) t j( max) =150c t a =25c gate charge characteristics 0 1 2 3 4 5 0123456 qg, total gate charge(nc) -v gs , gate-source voltage(v) v ds =-10v i d =-1.6a maximum safe operating area 0.01 0.1 1 10 100 0.01 0.1 1 10 100 -v ds , drain-source voltage(v) -i d , drain current (a) dc 10ms 100ms 1ms 100 s t a =25c, tj=150c, v gs =-4.5v, r ja =367c/w single pulse maximum drain current vs junctiontemperature 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 25 50 75 100 125 150 175 tj, junction temperature(c) -i d , maximum drain current(a) t a =25c, v gs =-4.5v, r ja =367c/w
cystech electronics corp. spec. no. : c322s3 issued date : 2013.08.29 revised date : 2013.09.09 page no. : 5/8 MTP2301S3 cystek product specification typical characteristics(cont.) typical transfer characteristics 0 2 4 6 8 10 012345 -v gs , gate-source voltage(v) -i d , drain current (a) -v ds =5v power derating curve 0 0.1 0.2 0.3 0.4 0 20 40 60 80 100 120 140 160 t a , ambient temperature() p d , power dissipation(w) mounted on fr-4 board with minimum pad area transient thermal response curves 0.01 0.1 1 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 1.e+02 t 1 , square wave pulse duration(s) r(t), normalized transient thermal resistance single pulse 0.01 0.02 0.05 0.1 0.2 d=0.5 1.r ja (t)=r(t)*r ja 2.duty factor, d=t 1 /t 2 3.t jm -t a =p dm *r ja (t) 4.r ja =367 c/w
cystech electronics corp. spec. no. : c322s3 issued date : 2013.08.29 revised date : 2013.09.09 page no. : 6/8 MTP2301S3 cystek product specification reel dimension carrier tape dimension
cystech electronics corp. spec. no. : c322s3 issued date : 2013.08.29 revised date : 2013.09.09 page no. : 7/8 MTP2301S3 cystek product specification recommended wave soldering condition peak temperature soldering time product pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak 10-30 seconds 20-40 seconds temperature(tp) ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of t he package, measured on the package body surface.
cystech electronics corp. spec. no. : c322s3 issued date : 2013.08.29 revised date : 2013.09.09 page no. : 8/8 MTP2301S3 cystek product specification sot-323 dimension millimeters inches millimeters marking: te style: pin 1.gate 2.source 3.drain 3-lead sot-323 plastic surface mounted package cystek package code: s3 2301 inches dim min. max. min. max. dim min. max. min. max. a 0.900 1.100 0.035 0.043 e1 2.150 2.450 0.085 0.096 a1 0.000 0.100 0.000 0.004 e 0.650 typ 0.026 typ a2 0.900 1.000 0.035 0.039 e1 1.200 1.400 0.047 0.055 b 0.200 0.400 0.008 0.016 l 0.525 ref 0.021 ref c 0.080 0.150 0.003 0.006 l1 0. 260 0.460 0.010 0.018 d 2.000 2.200 0.079 0.087 0 8 0 8 e 1.150 1.350 0.045 0.053 notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing specification or packing method, please c ontact your local cystek sales office. material: ? lead: pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitable for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance .
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